SLGの購入情報と機能
| この部品の機能は「CONDUCTIVE POLYMER ALUMINUM SOLID ELECTROLYTIC CAPACITORS」です。 |
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製品の詳細 ( データシート PDF )
| 部品番号 | 部品情報 | メーカー | PDF / カテゴリー |
|---|---|---|---|
| SLG Capacitor | CONDUCTIVE POLYMER ALUMINUM SOLID ELECTROLYTIC CAPACITORS CONDUCTIVE POLYMER ALUMINUM SOLID ELECTROLYTIC CAPACITORS
SLG SERIES SW, SWZ SERIES
UPGRADE UPGRADE
PC-CON
CONDUCTIVE POLYMER ALUMINUM SOLID ELECTROLYTIC CAPACITORS
PC-CON
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Rubycon |
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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| SLGSSTVF16859V | DDR 13 to 26 Bit Registered Buffer SLGSSTVF16859H, V
DDR 13 to 26 Bit Registered Buffer
Applications: PC1600, 2100, 2700, 3200 DDR memory modules 1:2 Outputs for stacked DDR DIMMS SSTL_2 compatible data registers Features: Compatible with JEDEC standard SSTV16859 Differential Clock inputs SSTL_2 data input signaling Supports |
 Silego |
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| SLG8SP513 | Clock Synthesizer SLG8SP513
Clock Synthesizer for Intel Mobile PCI-Express Chipset
Features
Low Power CK505 compatible clock synthesizer
SLG8SP513 is a cost reduced CK505 with integrated voltage regulator for mobile applications
Scalable Low Voltage VDD I, O (3.3V to 1.05V) to reduce power consumption
Low Power |
 Silego Technology |
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| SLG505YC264C | Clock Synthesizer SLG505YC264C
Clock Synthesizer for Intel PCI-Express Gen2 Chipset
Features
SLG505YC264C is fully compliant to Intel CK505 clock specification revision 1.0 SRC clocks compliant to PCI-Express Gen2 reference clock requirement (except SRC_0 and SRC_1) TME (Trusted Mode Enable) input to disable over |
Silego |
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| SLGSSTU32864E | DDR2 Configurable Registered Buffer SLGSSTU32864E
DDR2 Configurable Registered Buffer
Features: Compatible with JEDEC standard SSTU32864 Differential Clock inputs SSTL_18 Clock and data input signaling Output circuitry minimizes effects of SSO and unterminated lines LVCMOS input levels on control and RESET pins 1.7V-1.9V Supply |
 ETC |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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