ICS95V842の購入情報と機能
| この部品の機能は「DDR Phase Lock Loop Clock Driver」です。 |
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製品の詳細 ( データシート PDF )
| 部品番号 | 部品情報 | メーカー | PDF / カテゴリー |
|---|---|---|---|
| ICS95V842 Driver | DDR Phase Lock Loop Clock Driver Integrated Circuit Systems, Inc.
ICS95V842
DDR Phase Lock Loop Clock Driver (60MH- - 220MHz)
Recommended Application: 1:2 DDRI Clock Driver Product Description, Features: Low skew, low jitter PLL clock driver Feedback pins for input to output synchronization Spread Spectrum tolerant inputs Wit |
Integrated Circuit Systems |
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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| ICS5314I-11 | DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
Integrated Circuit Systems, Inc.
ICS85314I-11
LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL FANOUT BUFFER
FEATURES
5 differential 2.5V, 3.3V LVPECL outputs Selectable differential CLKx, nCLKx inputs CLK0, nCLK0 and CLK1, nCLK1 pairs can accept the following differential input levels: LVPE |
Integrated Circuit Systems |
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| ICS162834 | 18-Bit 3.3V Registered Buffer Integrated Circuit Systems, Inc.
ICS162834
Advance Information
18-Bit 3.3V Registered Buffer
Recommended Applications: PC133 Registered Memory Module PC motherboards Servers and workstations Provides complete PC133 DIMM solution with ICSVF2509, ICSVF2510 PLL. Product Features: Meets JESD 82- |
Integrated Circuit Systems |
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| ICS9112-05 | VCXO and Set-Top Clock Source w
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Integrated Circuit Systems |
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| ICS85311 | ECL/LVPECL Fanout Buffer
Integrated Circuit Systems, Inc.
ICS85311
Low Skew, 1-to-2 Differential-to-2.5V, 3.3V ECL, LVPECL Fanout Buffer
FEATURES
2 differential 2.5V, 3.3V LVPECL , ECL outputs 1 CLK, nCLK input pair CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL M |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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