ICS853017の購入情報と機能
| この部品の機能は「LVPECL/ECL RECEIVER」です。 |
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製品の詳細 ( データシート PDF )

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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| ICS952302 | Frequency Generator for TransmetaTM Integrated Circuit Systems, Inc.
ICS952302
Frequency Generator for Transmeta Efficeon
Recommended Application: Transmeta Efficion, ATi M6 Output Features: 3 - CPUs @ 3.3V including 1 free running CPUCLK_F 7 - PCI @ 3.3V, including 4 free running PCICLK_F 1 - 27MH- clock @ 3.3V 2 - 48MH- clocks |
![]() Integrated Circuit Systems |
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| ICS8430-51 | LOW JITTER LVCMOS/LVTTL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8430-51
600MHZ, LOW JITTER LVCMOS, LVTTL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
FEATURES
Dual differential 3.3V LVPECL outputs Selectable crystal oscillator interface or LVCMOS, LVTTL TEST_CLK Maximum output frequency: 600MH- Crystal input frequen |
![]() Integrated Circuit Systems |
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| ICS9248-141 | Frequency Generator & Integrated Buffers Integrated Circuit Systems, Inc.
ICS9248-141
AMD - K7™ System Clock Chip
Recommended Application: VIA KX133 style chipset Output Features: 1 - Differential pair open drain CPU clocks 1 - Single-ended open drain CPU clock 13 - SDRAM @ 3.3V 6 - PCI @3.3V, 1 - 48MHz, @3.3V fixed. 1 - 24, 48MH |
![]() Integrated Circuit Systems |
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| ICS672-02 | QuadraClock Quadrature Delay Buffer ICS672-01, 02 QuadraClock™ Quadrature Delay Buffer
Description
The ICS672-01 and ICS672-02 are zero delay buffers that generate four output clocks whose phases are spaced at 90° intervals. Based on ICS’ proprietary low jitter Phase Locked Loop (PLL) techniques, each device provides five low ske |
![]() Integrated Circuit Systems |
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