HD74LS158の購入情報と機能

HD74CDCV857 2.5-V Phase-lock Loop Clock Driver ADE-205-335C (Z) Preliminary 4th Edition March 2000 Description The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs. Features S

HD74AC298, HD74ACT298 Quad 2-Input Multiplexer with Storage Description This device is a high-speed multiplexer with storage. It selects four bits of data from two sources (Ports) under the control of a common Select input (S). The selected data is transferred to the 4-bit output register synchrono

HD74LV373A Octal D-type Transparent Latches with 3-state Outputs ADE-205-274 (Z) 1st Edition April 1999 Description The HD74LV373A has eight D type latches with three state outputs in a 20 pin package. When the latch enables input is high, the Q outputs will follow the D inputs. When the latch enab

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 ± 0.05 0.20 ± 0.