HD74HC597の購入情報と機能
| この部品の機能は「8-bit Latch/Shift Register」です。 |
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製品の詳細 ( データシート PDF )

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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
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| HD74HCT243 | Quad. Bus Transceivers (with 3-state outputs) HD74HCT242, HD74HCT243
Quad. Bus Transceivers (with 3-state outputs)
Description
The HD74HCT242 is an inverting buffer and the HD74HCT243 is a noninverting buffer. Each device has one active high enable (GBA), and one active low enable (GAB). GBA enables the A outputs and GAB enables the B outputs. |
Hitachi Semiconductor |
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| HD74UH32 | 2-input OR Gate HD74UH32
2-input OR Gate
ADE-205-018(Z) 2nd Edition August 1993 Description
The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS-TTL series. The internal circuit of three stages construction with |
Hitachi Semiconductor |
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| HD74HC27 | Triple 3-input NOR Gates HD74HC27
Triple 3-input NOR Gates
Features
High Speed Operation: tpd = 10 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 1 A max (Ta = 25°C)
Pin Arrangement
1A |
Hitachi Semiconductor |
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| HD74HC74AP | Dual D-type Flip-Flops (with Preset and Clear) HD74HC74
Dual D-type Flip-Flops (with Preset and Clear)
Description
The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at thte data input is transferred to the output during the positive going transition to the clock pulse. Preset and cl |
Hitachi Semiconductor |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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