DM74LS112Aの購入情報と機能
| この部品の機能は「Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs」です。 |
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製品の詳細 ( データシート PDF )
| 部品番号 | 部品情報 | メーカー | PDF / カテゴリー |
|---|---|---|---|
| DM74LS112A Flip-flop | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
August 1986 Revised March 2000
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
General Description
This device contains |
Fairchild Semiconductor |
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| DM74LS112A Flip-flop | NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS |
National Semiconductor |
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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| DM74S940 | (DM74S941) Octal Tri-State Buffers / Line Drivers / Line Receivers |  National |
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| DM74S188 | (32 x 8) 256-BIT TTL PROM | National Semiconductor |
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| DM74LS163AW | Synchronous 4-Bit Binary Counters 54LS161A DM54LS161A DM74LS161A 54LS163A DM54LS163A DM74LS163A Synchronous 4-Bit Binary Counters
May 1992
54LS161A DM54LS161A DM74LS161A 54LS163A DM54LS163A DM74LS163A Synchronous 4-Bit Binary Counters
General Description
These synchronous presettable counters feature an internal carry look-ahead f |
National Semiconductor |
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| DM74LS86 | Quad 2-Input Exclusive-OR Gate DM74LS86 Quad 2-Input Exclusive-OR Gate
August 1986 Revised March 2000
DM74LS86 Quad 2-Input Exclusive-OR Gate
General Description
This device contains four independent gates each of which performs the logic exclusive-OR function.
Ordering Code:
Order Number DM74LS86M DM74LS86SJ DM74LS86N Package |
Fairchild Semiconductor |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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