AD6659の購入情報と機能
| この部品の機能は「Dual IF Receiver」です。 |
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製品の詳細 ( データシート PDF )
| 部品番号 | 部品情報 | メーカー | PDF / カテゴリー |
|---|---|---|---|
| AD6659 receiver | Dual IF Receiver
Dual IF Receiver AD6659
FEATURES
12-bit, 80 MSPS output data rate per channel 1.8 V analog supply operation (AVDD) 1.8 V to 3.3 V output supply (DRVDD) Integrated noise shaping requantizer (NSR) Integrated quadrature error correction (QEC) Performance with NSR enabled SNR = 81 dBFS in 16 MH- band |
Analog Devices |
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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| AD6655 | IF Diversity Receiver IF Diversity Receiver AD6655
FEATURES
SNR = 74.5 dBc (75.5 dBFS) in a 32.7 MH- BW at 70 MH- @ 150 MSPS SFDR = 80 dBc to 70 MH- @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider Integrated dual-channel ADC Sample |
Analog Devices |
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| AD6025GP | Fan AD6025GP SERIES
Specifications(Nominal)
Frame size (mm)
AD0612HB-A71GP(P) AD0612UB-A71GP(P) AD0612XB-A71GP(P) AD0612VB-A71GP(P) AD0612EB-A71GP(PCU) AD0624HB-A71GP(P)
*:Noise is measured at the distance of one (1)meter from the axis of intake.
Bearin g type: ◎=Bal l ※=Sl e eve ○=1B1S ●=Hypr |
 ADDA |
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| AD652 | Monolithic Synchronous Voltage-to-Frequency Converter a
FEATURES Full-Scale Frequency (Up to 2 MHz) Set by External System Clock Extremely Low Linearity Error (0.005% max at 1 MH- FS, 0.02% max at 2 MH- FS) No Critical External Components Required Accurate 5 V Reference Voltage Low Drift (25 ppm, C max) Dual or Single Supply Operation Voltage or Curre |
Analog Devices |
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| AD625 | Programmable Gain Instrumentation Amplifier a
FEATURES User Programmed Gains of 1 to 10,000 Low Gain Error: 0.02% Max Low Gain TC: 5 ppm, C Max Low Nonlinearity: 0.001% Max Low Offset Voltage: 25 V Low Noise 4 nV, √H- (at 1 kHz) RTI Gain Bandwidth Product: 25 MH- 16-Lead Ceramic or Plastic DIP Package, 20-Terminal LCC Package Standard Mi |
Analog Devices |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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