AD6440の購入情報と機能
| この部品の機能は「Analog Front End」です。 |
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製品の詳細 ( データシート PDF )
| 部品番号 | 部品情報 | メーカー | PDF / カテゴリー |
|---|---|---|---|
| AD6440 Data | Analog Front End a
FEATURES Complete Analog Front End for ADSL Modems Part of ADI ADSL Chipset (AD20msp930)
Designed to ANSI T1.413, ETSI TR238, ITU G.adsl Performance
e.g., 6.1 Mbps Downstream Over 12K Ft. Suitable for CO or CPE (ATU-C and ATU-R) Includes Transmit and Receive Signal Paths:
DAC: 20 MSPS 14-Bit Curre |
Analog Devices |
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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| AD654 | Low Cost Monolithic Voltage-to-Frequency Converter a
FEATURES Low Cost Single or Dual Supply, 5 V to 36 V, 5 V to 18 V Full-Scale Frequency Up to 500 kH- Minimum Number of External Components Needed Versatile Input Amplifier Positive or Negative Voltage Modes Negative Current Mode High Input Impedance, Low Drift Low Power: 2.0 mA Quiescent Current |
Analog Devices |
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| AD6679 | 135 MHz BW IF Diversity Receiver Data Sheet
135 MH- BW IF Diversity Receiver AD6679
FEATURES
Parallel LVDS (DDR) outputs In-band SFDR = 82 dBFS at 340 MH- (500 MSPS) In-band SNR = 67.8 dBFS at 340 MH- (500 MSPS) 1.1 W total power per channel at 500 MSPS (default settings) Noise density = 153 dBFS, H- at 500 MSPS 1.25 V, 2.50 V, |
Analog Devices |
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| AD6624 | 80 MSPS Digital Receive Signal Processor
a
FEATURES 80 MSPS Wide Band Inputs (14 Linear Bits Plus 3 RSSI) Dual High Speed Data Input Ports Four Independent Digital Receivers in Single Package Digital Resampling for Noninteger Decimation Rates Programmable Decimating FIR Filters Programmable Attenuator Control for Clip Prevention and Exte |
Analog Devices |
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| AD6392 | 4 Ch Motor Drive IC AD6392 4-CH MOTOR DRIVE IC
DESCRIPTIONS
AD6392 is a 4-CH BTL driver suitable for driving motors and actuators in CD-P, VCD-P systems. Each channel drivers except the spindle driver have an internal primary filter and they can be directly connected to the servo’s PWM output without any attached ex |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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