74V2T03の購入情報と機能
| この部品の機能は「DUAL 2-INPUT OPEN DRAIN NAND GATE」です。 |
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製品の詳細 ( データシート PDF )

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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| 74VHCT373AM | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING ®
74VHCT373A
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
s s
s
s
s
s
s
s
s s
HIGH SPEED: tPD = 6.4 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS |
![]() STMicroelectronics |
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| 74VHC541 | OCTAL BUS BUFFER 74VHC541
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
s HIGH SPEED: tPD = 3.5 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 A (MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
)s POWER DOWN PROTECTION ON INPUTS t(ss SYMMETRICAL OUTPUT IMPEDANCE: c|IOH| = I |
![]() STMicroelectronics |
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| 74VHCT20AM | DUAL 4-INPUT NAND GATE ®
74VHCT20A
DUAL 4-INPUT NAND GATE
PRELIMINARY DATA
s s
s
s
s
s
s
s
s
HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT |
![]() STMicroelectronics |
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| 74VHC4046M | CMOS Phase Lock Loop
74VHC4046 CMOS Phase Lock Loop
April 1994 Revised October 2003
74VHC4046 CMOS Phase Lock Loop
General Description
The VHC4046 is a low power phase lock loop utilizing advanced silicon-gate CMOS technology to obtain high frequency operation both in the phase comparator and VCO sections. This devi |
Fairchild Semiconductor |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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