74F843SCの購入情報と機能
| この部品の機能は「9-Bit Transparent Latch」です。 |
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製品の詳細 ( データシート PDF )

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関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| 74F193 | Up/down binary counter with separate up/down clocks INTEGRATED CIRCUITS
74F193 Up, down binary counter with separate up, down clocks
Product specification IC15 Data Handbook 1995 Jul 17
Philips Semiconductors
Philips Semiconductors
Product specification
Up, down binary counter with separate up, down clocks
74F193
FEATURES
Synchronous reversi |
![]() Philips |
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| 74F114 | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 74F114 Dual JK Negative Edge-Triggered Flip-Flop
April 1988 Revised August 1999
74F114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
General Description
The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are init |
Fairchild Semiconductor |
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| 74F843SPC | 9-Bit Transparent Latch 74F843 9-Bit Transparent Latch
January 1988 Revised July 1999
74F843 9-Bit Transparent Latch
General Description
The 74F843 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address, data paths or buses carryi |
![]() Fairchild |
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| 74F583PC | 4-Bit BCD Adder 74F583 4-Bit BCD Adder
April 1988 Revised March 1999
74F583 4-Bit BCD Adder
General Description
The ’F583 high-speed 4-bit, BCD full adder with internal carry lookahead accepts two 4-bit decimal numbers (A0 A3, B0 B3) and a Carry Input (Cn). It generates the decimal sum outputs (S0 S3), and a Ca |
![]() Fairchild |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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