74F148SJの購入情報と機能
| この部品の機能は「8-Line to 3-Line Priority Encoder」です。 |
|
|
製品の詳細 ( データシート PDF )

PDF and Buy Now
関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| 74F64SJ | 4-2-3-2-Input AND-OR-Invert Gate 74F64 4-2-3-2-Input AND-OR-Invert Gate
April 1988 Revised March 1999
74F64 4-2-3-2-Input AND-OR-Invert Gate
General Description
This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function.
Ordering Code:
Order Number 74F64SC 74F64SJ 74F64PC Package Number M14A M14D N14 |
![]() Fairchild |
![]() |
| 74F862 | Bus transceivers 3-State INTEGRATED CIRCUITS
74F862, 74F863 Bus transceivers (3-State)
Product specification Supersedes data of 1999 Jan 08 IC15 Data Handbook 2000 Mar 24
Philips Semiconductors
Philips Semiconductors
Product specification
Bus transceivers (3-State)
74F862, 74F863
FEATURES
Provide high performance b |
![]() Philips |
![]() |
| 74F621 | Octal bus transceiver / non-inverting open collector INTEGRATED CIRCUITS
74F621 Octal bus transceiver, non-inverting (open collector)
Product specification IC15 Data Handbook 1996 Jan 05
Philips Semiconductors
Philips Semiconductors
Product specification
Octal bus transceiver, non-inverting (open collector)
74F621
FEATURES
High-impedance NPN |
![]() Philips |
![]() |
| 74F823SC | 9-Bit D-Type Flip-Flop 74F823 9-Bit D-Type Flip-Flop
April 1988 Revised August 1999
74F823 9-Bit D-Type Flip-Flop
General Description
The 74F823 is a 9-bit buffered register. It features Clock Enable and Clear which are ideal for parity bus interfacing in high performance microprogramming systems.
Features
s 3-STATE ou |
![]() Fairchild |
![]() |
|
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
|
|


