NC7S14M5 データシート PDF
この部品の機能は「TinyLogic HS Inverter with Schmitt Trigger Input」です。
NC7S14M5 Datasheet |
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| NC7S14M5 | TinyLogic HS Inverter with Schmitt Trigger Input NC7S14 TinyLogic HS Inverter with Schmitt Trigger Input
January 1996 Revised June 2000
NC7S14 TinyLogic HS Inverter with Schmitt Trigger Input
General Description
The NC7S14 is a single high performance CMOS Inverter with Schmitt Trigger input. The circuit design provides hysteresis between the po |  |  |
| NC7S14M5X | TinyLogic HS Inverter with Schmitt Trigger Input | | |
関連検索結果
| 部品番号 | 部品情報 | メーカー | |
|---|---|---|---|
| NC7S14CW | HS Inverter with Schmitt Trigger Input • Schmitt input hysteresis: > 1V typ
• High speed: tPD 4.5 ns typ
• Low quiescent power: ICC < 1 μA | Fairchild | |
| NC7SP38P5X | TinyLogic ULP 2-Input NAND Gate (Open Drain Output) | Fairchild | |
| NC7SV38L6X | TinyLogic. ULP-A 2-Input NAND Gate (Open Drain Output) NC7SV38 TinyLogic ULP-A 2-Input NAND Gate (Open Drain Output)
August 2002 Revised March 2003
NC7SV38 TinyLogic ULP-A 2-Input NAND Gate (Open Drain Output)
General Description
The NC7SV38 is a single 2-Input NAND Gate with open drain output stage from Fairchild’s Ultra Low Power-A (ULP-A) series | Fairchild | |
| NC7SP125L6X | TinyLogic ULP Buffer with 3-STATE Output | Fairchild | |
| NC7SV08 | TinyLogic ULP-A 2-Input AND Gate NC7SV08 TinyLogic ULP-A 2-Input AND Gate
June 2002 Revised January 2003
NC7SV08 TinyLogic ULP-A 2-Input AND Gate
General Description
The NC7SV08 is a single 2-Input AND Gate from Fairchild’s Ultra Low Power-A (ULP-A) series of TinyLogic . ULP-A is ideal for applications that require extreme high | Fairchild | |
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