C8051F809 データシート PDF

C8051F80x-83x Mixed Signal ISP Flash MCU Family Capacitance to Digital Converter - Supports buttons, sliders, wheels, and capacitive proximity sensing High-Speed 8051 C Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - Fast 40 s per channel conve

Analog Peripherals - 12-Bit ADC Up to 200 ksps Up to 32 external single-ended inputs VREF from on-chip VREF, external pin or VDD Internal or external start of conversion source Built-in temperature sensor - Two Comparators Programmable hysteresis and response time Configurable as interrupt or

C8051F96x Ultra Low Power 128K, LCD MCU Family Ultra Low Power Consumption at 3.6 V - 130 A, MH- Low-Power Active mode with dc-dc enabled - 120 nA sleep current w, data retention; POR monitor enabled - 450 nA sleep mode with SmaRTClock (internal LFO) - 600 nA sleep mode with SmaRTClock (ext. cry