ADDS-2171-EZ-ICE-P データシート PDF

a FEATURES ADSP-2100 Family Development Tools ADDS-21xx-TOOLS LINKER Maps Assembler Output to Target System Memory Supports User-Defined Library Routines Creates Memory Map Listing PROM SPLITTER & HOST PROCESSOR PORT (HIP) SPLITTER Generates PROM Programmer Compatible Files in a Variety of Industry

Data Sheet Dual-Channel CCD Signal Processor with Precision Timing Core ADDI7013 FEATURES Differential analog inputs CDS or SHA (CDS bypass) with 7 gain settings 0 dB to 36 dB, 10-bit variable gain amplifier (VGA) 16-bit, 75 MSPS analog-to-digital converter (ADC) Precision Timing core with 210 ps

Data Sheet Quad-Channel, 16-Bit CCD Signal Processor with Precision Timing Core ADDI7015 FEATURES 4 independent AFE channels 1.8 V analog and digital core supply voltage Complete on-chip ISATG timing generator with 16 XV outputs and 4 general-purpose outputs (GPO) Differential analog inputs CDS or